1. Field of the Invention
The present invention relates to a signal input circuit, and more particularly to a digital signal input circuit suitable for use in a high-speed and small-amplitude interface circuit.
2. Description of the Related Art
Hitherto, a circuit including the combination of a current mirror type differential amplifier and a latch circuit has been used widely as a circuit for inputting a digital signal having a small amplitude. In such a circuit, the small-amplitude digital signal is amplified by the current mirror type differential amplifier up to a voltage capable of being handled by a digital circuit and is thereafter held by the latch circuit. For example, a signal input circuit shown in FIG. 1 includes a differential amplifier 3 for amplifying a difference between an input signal (or a small-amplitude digital signal) and a reference voltage and a latch circuit 4 for taking an output signal of the differential amplifier 3 therein by a clock signal and holding it. The input signal is amplified by the differential amplifier 3 and is thereafter stored in the latch circuit 4 under control of the clock signal and held thereby. Thereafter, the input signal is outputted as a digital output signal from the latch circuit 4.
In such an input circuit, however, since the output signal of the differential amplifier 3 is stored in the latch circuit 4 under control of the clock signal, the latch circuit 4 takes in only a momentary voltage of the input signal which is continuously valid for a certain time. Accordingly, such an input circuit is to erroneously determining the level of the input signal in the case where noise is superimposed on the input signal.
For example, as shown in FIGS. 2A to 2C, in the case where noise is not superimposed on the input signal, the output signal of the differential amplifier 3 assumes a rectangular wave corresponding to a difference between the input signal and the reference voltage, and the digital output signal outputted from the latch circuit 4 also assumes a rectangular wave corresponding to the input signal. However, in the case where noise is superimposed on the input signal, it does not necessarily follow due to the influence of the noise that the output signal of the differential amplifier 3 assumes a rectangular wave corresponding to a difference between the input signal and the reference voltage. Namely, when a large amplitude noise signal is superimposed on the input signal at a point of time traced back from the timing of latching by the latch circuit 4 by a delay time of the differential amplifier 3, the output signal of the differential amplifier 3 is not accurate, and an insufficient voltage is produced at the time of latching by the latch circuit 4. In such a case, an abnormal condition called a "metastable" condition is generated in the latch circuit 4 so that an erroneous voltage is held by the latch circuit 4.
In order to have the maximum margin for noise, the waveform of the input signal must be approximated to a rectangular wave as much as possible, and it is necessary that the time of latching by the latch circuit 4 be set to a point of time when the amplitude of the input signal becomes a maximum. However, in the case where the transfer rate becomes higher than 100 MHz, it is very difficult to pricisely control the waveform the input signal and the timing of latching by the latch circuit 4.
Also, JP-A-8-63268 has disclosed an input/output interface circuit device in which an integrating circuit for integrating an input signal is provided to reduce the influence of noise. However, this input/output interface circuit device does not have an integrating circuit for integrating a reference voltage inputted from a reference voltage terminal. Therefore, in the case where noise is superimposed on the reference voltage, it is not possible to obtain an accurate digital output signal.